(a) Field of the Invention
The present invention relates to a method for manufacturing a multilevel interconnection structure and, more particularly, to a technique for cleaning a through-hole in a semiconductor device before forming an overlying interconnect layer.
(b) Description of the Related Art
With a development of a finer interconnect pattern in a semiconductor device, the spacing between adjacent interconnects are increasingly reduced. On the other hand, the thickness of the interlevel dielectric film tends to increase. This is partly because cross-talk should be reduced between adjacent interconnect layers in a logic LSI, and partly because a large step difference formed between the cell area and the peripheral area requests a planarization step for the surface of an interlevel dielectric film in view of the improvement in the focus margin during a photolithographic step in the fabrication of a DRAM device.
Both the decrease of the spacing in the interconnect pattern and the increase of the thickness of the interlevel dielectric film increase the aspect ratio of a through-hole for a contact of a diffused region or a via between interconnect layers. In a current dry-etching technique for forming a deep through-hole, reactive ion etching (RIE) having a high anisotropic property is generally employed in a low pressure ambient while simultaneously depositing and etching fluorocarbon based deposits on the inner wall of the through-hole. In view of the high integration of the LSI, a through-hole that penetrates a plurality of interlevel dielectric films should be designed as vertical as possible, which renders the through-hole to have a higher aspect ratio.
In the dry-etching of a dielectric film, the underlying layer, which may be silicon in the case of a contact for a diffused region or a metal such as aluminum in the case of an interconnect layer, should not over-etched, which requests a higher selective ratio in the etching between the dielectric film and the underlying layer.
Especially, in the case of a through-hole for a diffused region (specifically referred to as a contact-hole hereinafter), a silicon oxide film should be etched with a high selective ratio between silicon oxide and silicon. A method for forming a vertical contact-hole having a high aspect ratio is described in literature "Generation of High-frequency and High-density Plasma and its Process Application", proceedings of 41st Semiconductor Special Seminar, pp153, for example. The literature recites a process using a high-density plasma source in a low pressure, such as induction coupling plasma, while applying a high-frequency power to a semiconductor substrate. In this process, however, if a source gas having a lower atomic ratio of C/F, such as CHF.sub.3, is used as the high-density plasma source, there arises a problem in that its high decomposition rate generates excess fluorine ions or fluorine radicals in the process, thereby causing undesirable etching of the underlying silicon at the bottom of the contact-hole.
The above problem may be overcome to some extent by using a high C/F ratio source gas, such as C.sub.4 F.sub.8, so as to suppress the etching of the underlying silicon. In this case, a hard film having a low fluorine ratio can cover the silicon surface to protect the same against ion collisions. The selective ratio between silicon oxide and silicon may be further improved by adding H.sub.2 to suppress the etch rate of the silicon due to the function of hydrogen atoms for removing excess fluorine in the from of HF.
In such a condition, however, fluorocarbon based materials are generally deposited on the silicon surface just after the silicon surface is exposed by the etching, thereby filling the resultant contact-hole. Especially, if there are a large number of contact-holes having different depths, an over-etching of the deeper contact-holes fills the shallower contact-holes with the fluorocarbon based deposits. The removal of the fluorocarbon based deposits is difficult to achieve in the contact-holes having small sizes and high aspect ratios even by a combination of oxygen plasma ashing and a wet etching.
In addition, a native oxide film is generally formed on the silicon surface, after the formation of the contact-holes, in the case of the oxygen plasma ashing and the wet etching. The native oxide film may be removed by a wet treatment using dilute hydrofluoric (HF) acid before sputtering a barrier metal for formation of a titanium film or titanium nitride film. However, the small-sized and deep contact-hole again retards the effective removal of the native oxide film in this case. In summary, a dry-cleaning step is necessary for the removal of the fluorocarbon based deposits in the contact-holes and the native oxide film from the bottom of the contact-holes.
In the case of through-holes for connecting adjacent interconnect layers (specifically referred to as via-holes hereinafter), fluorocarbon based materials are deposited in the via-holes and an alumina (Al.sub.2 O.sub.3) film is formed on the underlying aluminum interconnects. Dilute hydrofluoric acid should not be used for the via-holes because of the etching of the metal by the hydrofluoric acid. A physical sputtering using argon and a high-frequency power is attempted to remove an oxide film; however, it is not effective in the case of small-sized and high-aspect ratio via-holes. On the contrary, fluorocarbon based materials are deposited in the via-holes in the physical sputtering, deposits of silicon oxide films remain in the via-holes as a result of the etching of the interlayer dielectric film, and an alumina film remains in the bottom of the via-holes.
After formation of a through-hole, tungsten is generally used as a conductive material in the through-hole, and a titanium film and a titanium nitride film are generally used as underlying barrier layers. The native oxide film in the contact-hole or the alumina film in the via-hole raises the contact resistance or causes a connection defect, i.e., an open-circuit failure. On the other hand, the fluorocarbon based deposits causes voids or peel-off in the through-hole after subsequent thermal treatments at around 400.degree. C. or above, thereby degrading the reliability of the through-holes. The fluorocarbon based deposits also sometime cause a connection defect itself.
In view of the above, in the current fabrication process of semiconductor devices, a pretreatment is generally conducted for removing fluorocarbon based deposits and oxide films before sputtering a barrier metal. An example of the pretreatment is described in Patent Publication JP-A-1(1989)-196819, for example.
In the Patent Publication, as shown in FIG. 1A, a contact-hole 704 is formed in an insulator film 703 for exposing a diffused region 702 of a silicon substrate 701, followed by a plasma treatment by hydrogen ions 707 generated in a hydrogen plasma, as shown in FIG. 1B, thereby removing a native oxide film 705 on the silicon surface by the deoxidizing function of the hydrogen. In this step, the hydrogen ions are generated by an electron cyclotron resonance (ECR) technique, so as to irradiate the hydrogen ions having an acceleration energy as low as 10 to 20 eV to the silicon surface at a high density.
The resultant hydrogen ions do not react with the silicon, thereby removing the oxide film selectively from the silicon and causing substantially no damage on the diffused region 702. In addition, this process can be conducted at a room temperature, which prevents the variation in an impurity profile of the silicon substrate. In the publication, it is recited that a tungsten film 709 is formed by a deoxidizing reaction of WF.sub.6 with silicon or hydrogen followed by formation of a sputtered aluminum film 710.
In the technique as described above, an open-circuit failure or a high connection resistance is sometimes observed in a small-sized and high-aspect ratio contact-hole. This is caused by the incomplete etching of the fluorocarbon based deposits 706, as shown in FIG. 1B, due to the lower energy hydrogen ions 707. The low energy hydrogen ions 707 can etch only a native oxide film after the fluorocarbon deposits 706 are completely removed in a large-sized and low-aspect ratio contact-hole, and leaves the fluorocarbon deposits 706 and a portion of the native oxide film 705 in the high-aspect ratio contact-hole 704.
Another example of the pretreatment is described in Patent Publication JP-A-2-26025. As shown in FIG. 2A, a field oxide film 802 is formed on a p-type silicon substrate 801 for defining a plurality of cell areas together with p-type channel stoppers 803, followed by formation of a gate oxide film 804 and a gate electrode 805 in each cell area. N-type source/drain diffused regions 806 and 807 are then formed in the cell area by self-alignment with the gate electrode 805, and an impurity blocking oxide film 808 is then formed thereon, followed by CVD of PSG to form an interlevel dielectric film 809.
A photoresist pattern having contact-holes 811A and 811B is then formed on the PSG film 809 by a photolithographic process to form the structure of FIG. 2A. Then, the PSG film 809 and the underlying blocking film 808 are subjected to a reactive ion etching using the photoresist pattern 810 as a mask to form contact-holes 814A and 814B in the PSG film 809 and the blocking film 808, for exposing the source/drain regions 806 and 807. In this step, damaged regions 812A and 812B having a thickness of about a few dozens angstroms are formed in the surface region of the portions of the source/drain regions 806 and 807 exposed by the contact-holes 814A and 814B.
Subsequently, the resist mask 810 is removed by an ashing step using an O.sub.2 plasma, as shown in FIG. 2B. In this step, the damaged regions 812A and 812B grow to have a larger thickness of about 100 angstroms.
The substrate (951) formed by the steps of FIGS. 2A to 2C is then mounted on a target electrode 953 in a RIE chamber 952, as shown in FIG. 3. O.sub.2 gas containing 20% CF.sub.4 is introduced into the chamber 952 through an inlet tube 954 and evacuated therefrom through an outlet tube 955 while maintaining the internal pressure of the chamber 952 at about 1.2 Torr. A high-frequency power of about 1-2 watts/cm.sup.2 density is then applied between the target electrode 953 and a counter electrode 956 for 20-60 seconds, thereby removing the damaged regions 812A and 812B by using excited oxygen and fluorine ions or radicals supplied from the plasma containing O.sub.2 and CF.sub.4.
In the another example, there is possibility of leakage current flowing from the n.sup.+ -diffused regions 806 and 807 to the silicon substrate 801 due to the enlarged damaged regions 817A and 817B of the silicon substrate. In addition, the concentration of the active oxygen ions is generally low in the RIE process, thereby necessitating a larger length of time for removal of the fluorocarbon based deposits. Further, the high pressure in the RIE process retards the anisotropic etching and provides substantially isotropic etching. As a result, after the fluorocarbon based deposits remaining in the corner regions of the contact-holes are removed, the top openings of the contact-holes are generally enlarged, as shown in FIG. 2C, which retards the high integration of the semiconductor device.
A third example of the pretreatment is described in Patent Publication JP-A-4-129217. First, as shown in FIG. 4A, a first level aluminum interconnect 1003 is formed as overlying a silicon substrate 1001 with an intervention of a silicon oxide film 1002 disposed therebetween. Subsequently, a silicon oxide film 1004 is formed as an interlevel dielectric film on the first level aluminum interconnect 1003, followed by a selective dry etching using a photoresist film as a mask for forming through-holes therein. After the photoresist film is removed and before a sputtering step for forming a second level interconnect, a pretreatment is conducted for removing the deposits, attached to the through-holes in the previous etching step, by a RIE technique using fluorine radicals or ions generated from a plasma containing argon gas added with fluorine based gas, such as SF.sub.6 or CF.sub.4.
The attached deposits are generally formed in the etching step as a material falling from the interlevel dielectric film. The attached deposits have a thickness as low as around several dozens of nanometers, and accordingly, the fluorine based gas may be added in a minute amount, such as in 5% of the argon gas. Or otherwise, i.e., if the amount is too large, the silicon oxide film 1004 is over-etched. Without exposing the resultant substrate, aluminum is sputtered onto the dielectric film 1004 having through-holes therein to form a second level aluminum film.
In the third example, the fluorocarbon based deposits 1006 are not effectively etched by the plasma 1008 containing argon gas added with fluorine, remain in the through-holes 1005 after the plasma etching, and cause voids or peel-off of the second level interconnect from the through-hole 1005. This is due to the fact that the plasma 1008 containing argon and fluorine does not chemically etch the fluorocarbon based deposits 1006.
The prior arts as described above do not effectively remove the fluorocarbon based deposits or oxide deposits remaining in a high-aspect ratio through-hole and a native oxide film or alumina film formed at the bottom of the through-hole.